As memory density continues to increase, the industry has turned to 3D structures. Vertically-arranged storage devices are constructed within stacks of alternating layers of dielectric and metal in 3D NAND devices. And there are new types of memory such as PCRAM, ReRAM, FeRAM, etc. that will also utilize similar 3D configurations.
Currently, the stacks of alternating layers of dielectric and metal in 3D NAND devices are constructed by first depositing alternating layers of permanent dielectric (e.g., SiO2) and temporary/sacrificial dielectric (e.g., Si3N4). Then, after channel hole etch and NAND device formation in the channel hole, the Si3N4 layers are removed, typically by wet etch, and replaced by metal layers (e.g., TiN barrier plus W fill for the lateral wordlines in 3D NAND). As the stacks get taller (e.g., from first generation 24/36-pair to future 96/>100-pair), the vertical features (such as channel holes, slits/trenches, staircases, etc.) will become more difficult to etch, and the lateral metal (wordline for 3D NAND) layers more difficult to fill post-Si3N4 removal.